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Integrated Circuits Inc. APLUS aIVR Series MAKE YOUR PRODUCTION A-PLUS Data Sheet aIVR1004 - 10 sec aIVR2104 - 21 sec AIVR4208 - 42 sec aIVR8508 - 85 sec aIVR34112 - 341 sec APLUS INTEGRATED CIRCUITS INC. Sales E-mail: Address: 3 F-10, No. 32, Sec. 1, Chenggung Rd., Taipei, Taiwan 115, R.O.C. (115) 32 3 10. TEL: 886-2-2782-9266 FAX: 886-2-2782-9255 WEBSITE : http: //www.aplusinc.com.tw sales@aplusinc.com.tw Technology E-mail: service@aplusinc.com.tw 1 Nov 06, 2008 Integrated Circuits Inc. FEATURES l l l l l l l l l l l l l Standard CMOS process. Embedded EPROM. Embedded 8-bit MCU. aIVR Series 10, 21, 42 and 85sec voice duration at 6 KHz sampling with 4-bit ADPCM compression. Combination of voice building blocks to extend playback duration. Table entries are available for voice block combinations. User selectable PCM or ADPCM data compress. Voice Group Trigger Options: Edge / Level; Hold / Un-hold; Retrigger / Non-retrigger. Programmable I/Os, Timer Interrupt and Watch Dog Timer. Built-in oscillator with fixed Rosc, software control sampling frequency 2.2V - 3.6V single power supply and < 5uA low stand-by current. PWM Vout1 and Vout2 drive speaker directly. D/A COUT with ramp-up ramp-down option to drive speaker through an external BJT. DESCRIPTION Aplus' aIVR is a 8-bit CPU based Voice chip series. It is fabricated with Standard CMOS process with embedded voice storage memory. It can store from 10 to 341 sec voice message with 4-bit ADPCM compression at 6KHz sampling rate. 8-bit PCM is also available as user selectable option to improve sound quality. Depending on IC body, there are up to twelve programmable I/O pins. Key trigger and Parallel CPU trigger mode can be configured according to different application requirement. User selectable triggering and output signal options provide maximum flexibility to various applications. Built-in resistor controlled oscillator, 8-bit current mode D/A output and PWM direct speaker driving output minimize the number of external components. Part Number aIVR1004 aIVR2104 AIVR4208 aIVR8508 aIVR34112 Duration 10 sec 21 sec 42 sec 85 sec 341 sec Programmable IO 4 4 8 8 12 2 Nov 06, 2008 Integrated Circuits Inc. PIN CONFIGURATIONS aIVR Series PIN DESCRIPTIONS Pin Names VOUT1 VOUT2_COUT VSS OSC VDDA VDD PBn PCn PDn RSTB Description PWM output to drive speaker directly PWM output or COUT DAC output select by programmable option Power Ground Oscillator input Positive Power Supply Positive Power Supply Programmable I/O pins (n: 0 to 3) Programmable I/O pins (n: 0 to 3 for AIVR4208/34112) Programmable I/O pins (n: 0 to 3 for aIVR34112) Reset pin, Low active Note: PBn, PCn and PDn are software programmable I/O pins that can be set to different configurations such as pure input, input with pull-up, input with pull-down and output. The programmable I/O pins set up will take effect immediately after chip RESET is applied. 3 Nov 06, 2008 Integrated Circuits Inc. BLOCK DIAGRAM aIVR Series OSC Oscillator MEMORY Clock Tree Generator VDD VDDA GND 8-bit MCU PB0 ~ 3 PC0 ~ 3 I/O PWM Driver & 8-bit DAC VOUT1 VOUT2_ COUT ABSOLUTE MAXIMUM RATINGS Symbol VDD - VSS VIN VOUT T (Operating): T (Junction) T (Storage) Rating -0.5 ~ +3.8 VSS - 0.3 Nov 06, 2008 Integrated Circuits Inc. Symbol VDD ISB IOP VIH VIL IVOUTL IVOUTH ICO IOH IOL RNVOUT RNPIO RUPIO aIVR Series Unit V A mA V V mA mA mA mA mA I/O properly terminated I/O properly terminated VDD=3.0V VDD=3.0V Vout=1.0V Vout=2.0V Data = 80h VOH=2.5V VOL=0.3V VOUT pin set to internal pull-down PBx, PCx, PDx set to internal pull-down PBx, PCx, PDx set to internal pull-up VDD = 3V +/- 0.4V Also apply to lot to lot variation DC CHARACTERISTICS ( TA = 0 to 70, VDD = 3.0V, VSS = 0V ) Parameter Operating Voltage Standby current Operating current "H" Input Voltage "L" Input Voltage VOUT low O/P Current VOUT high O/P Current C OUT O/P Current O/P High Current O/P Low Current VOUT pull-down resistance Programmable IO pin pull-down resistance Programmable IO pin pull-up resistance Min. 2.2 2.5 -0.3 3.3K Typ. 3.0 1 3.0 0 130 -130 -2 -8 8 100K Max. 3.6 5 15 3.5 0.5 Conditions 1M 4.7K Fs/Fs Frequency stability -3 +3 % Fc/Fc Chip to chip Frequency Variation -5 +5 % 5 Nov 06, 2008 Integrated Circuits Inc. TYPICAL APPLICATIONS aIVR Series C1 ROSC=610K VDD,VDDA OSCI PB0 PB1 PB2 VOUT1 VOUT2_ COUT PB3 RSTB 8 / 16 Speaker 3.3V 4.7K 0.1uF VSS Note : PB0 to PB2 are set to input; PB3 is set to output C1 = 0.1uF to 2.2uF depend on the kind of power supply. Using 3.3V Battery HT7335 C1 ROSC = 610K 8 1/4W Speaker VDD,VDDA OSCI PB0 PB1 PB2 VOUT2_ COUT Rb Tr 4.5V 4.7K RST VSS 0.1uF Note : PB0 to PB2 are set to input C1 = 0.1uF to 2.2uF depend on the kind of power supply. Output driving of HT LDO: HT7136 (30mA, 3.6V) HT7133 (30mA, 3.3V) HT7536 (100mA, 3.6V) HT7335 (250mA, 3.5V) Using 4.5V Battery 6 Nov 06, 2008 Integrated Circuits Inc. aIVR Series VIN=+5V VOUT=+3.5V HT7335 C1 ROSC =610K 470K 8 1/4W Speaker VDD,VDDA OSC PB0 PB1 PB2 PB3 RST Addr[0] Addr[1] Addr[2] IO0 Note: 1. C1 is capacitor from 0.1uF to 2.2uF depends on the kind of Vdd source and sound loudness. E.g. If COUT is used, C1 can be 0.1uF. However, if PWM direct drive speaker is used, C1 should be at least 2.2uF 2. Rb is base resistor from 120 Ohm to 390 Ohm depends on Vdd value and transistor gain. 3. Tr is an NPN transistor with beta larger than 150, e.g. 8050D. 4. Rosc = 610K Ohm with Vdd=3.0V MCU VOUT2_ COUT Rb Tr 0.1uF VSS Note : PB0 to PB2 set to internal pull-up Addr[0] to [2] are open drain output drive 5V CPU Control with COUT 7 Nov 06, 2008 Integrated Circuits Inc. Bonding Diagrams aIVR Series 8 Nov 06, 2008 |
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